As a driver circuit of a display device, a semiconductor circuit that is inputted with signals for controlling the operation timing of transistors is used for various semiconductor devices.
Note that the semiconductor device in this specification means all devices that can function by utilizing the semiconductor characteristics, and all of electronic optical devices and electronic apparatuses fall within the category of the semiconductor device.
FIG. 23 shows a configuration example of a conventional semiconductor circuit that constitutes a shift register circuit or a latch circuit (see Patent Document 1, for example). The semiconductor circuit shown in FIG. 23 is constructed of a first clocked inverter CKINV1, a second clocked inverter CKINV2, and an inverter circuit INV.
An input terminal of the first clocked inverter CKINV1 is inputted with an input signal IN from outside, and an output terminal of the CKINV1 is connected to an input terminal of the inverter INV and an output terminal of the second clocked inverter CKINV2. An input terminal of the second clocked inverter CKINV2 is connected to an output terminal of the inverter INV.
Upon input of an input signal IN into the input terminal, an output signal OUT1 is outputted from the output terminal in synchronization with a timing control signal TP and an inverted timing control signal TPB obtained by inverting the timing control signal TP, which have been inputted to each of the first clocked inverter CKINV1 and the second clocked inverter CKINV2.
FIG. 24 shows a circuit diagram where transistors are used for illustrating the first clocked inverter CKINV1, the second clocked inverter CKINV2 and the inverter circuit INV that constitute a semiconductor circuit having the configuration shown in FIG. 23. In the semiconductor circuit shown in FIG. 24, a total of 10 transistors are used: 4 transistors for the first clocked inverter CKINV1, 4 transistors for the second clocked inverter CKINV2, and 2 transistors for the inverter INV.
A shift register circuit or a latch circuit of a driver circuit are provided with multiple stages of the semiconductor circuit in FIG. 24, which respectively output signals by shifting input signals by a half cycle, and sample and hold inputted signals.
Patent Document 1—Japanese Patent Laid-Open No. Hei 8-161896
In the configuration of the conventional semiconductor circuit in FIG. 23 and FIG. 24 that constitutes a shift register circuit or a latch circuit, 2 clocked inverters and one inverter are used, and a total of 10 transistors are used as shown in FIG. 24.
Since the aforementioned semiconductor circuit uses multiple stages to construct a shift register circuit or a latch circuit, the number of transistors for manufacturing the shift register circuit or the latch circuit is increased in proportion to the number of transistors used in the semiconductor circuit. Therefore, in an active matrix display device, the number of transistors that is increased in accordance with the increased columns and rows of a pixel portion leads to an increase in the layout area of a driver circuit. In addition, such a problem is posed that the yield is decreased resulting from variations of transistors in accordance with the increased number of transistors for constructing the circuit.
As set forth above, a semiconductor circuit that constitutes a shift register circuit or a latch circuit has problems presently on the configuration such as an increased layout area and a decreased yield. The invention is made in view of the foregoing problems, and therefore the invention provides a semiconductor circuit, a display device, and an electronic apparatus having the display device for solving the aforementioned problems.